A Fully Differential Analog Read-Out Circuit for Differential Capacitive Sensors

Capacitive sensors function by detecting changes in physical phenomena—such as distance or area—that alter the capacitance of a structure. Among various designs, differential capacitive sensors, which use paired capacitors with complementary responses to a measurand, are particularly favoured for their accuracy. However, these sensors often demand complex interface circuits.

To address this, various interface approaches have been explored, including digital, mixed-signal, and analogue techniques. One notable analogue method involves an auto-balanced bridge, using an H-bridge with negative feedback to directly measure sensor changes, eliminating the need for complex computations.

This study introduces a fully differential analogue read-out circuit for differential capacitive sensors, employing an auto-balancing bridge with differential voltage-controlled capacitors (VCCs). The VCCs dynamically adjust to match the changes in the sensor capacitance under steady-state conditions through a negative feedback mechanism using a modulation-demodulation technique and integral control. At its core, the system supplies the capacitive sensing bridge with a sinusoidal carrier signal.

The output voltages from the bridge are compared in an Error Calculator block, implemented through instrumentation amplifiers. The error signal, which is in the carrier frequency band, is then demodulated by multiplying it with the carrier signal. The resulting baseband signal is filtered and processed by an inverting and a non-inverting integrator, providing the differential control voltages (Vctrl1, Vctrl2) that drive the VCCs. This integral control ensures the error approaches zero as the output signal's speed diminishes.

The interface was mathematically modelled, considering key parasitic effects, which are represented as parallel capacitances to the VCCs. As a result, parasitic capacitances affect the slope of the output and introduce an offset proportional to their difference. The circuit was manufactured on a printed circuit board (PCB) using computer numerical control milling to demonstrate the feasibility of the approach. Particular attention was given to symmetry in the layout design to mitigate parasitic effects that could cause differences in the output control voltages.

Experimental testing of the fabricated PCB demonstrated strong agreement with the theoretical model under static conditions, showing a maximum deviation of 9.3%. The interface achieved a sensitivity of 102 mV/pF, a resolution of 20 fF, and a linearity error of 0.47%.

Changes in the sensor’s baseline capacitance led to variations in both linearity and saturation points. Under common-mode conditions, the differential output voltage exhibited a minimum offset of 0.126 V, corresponding to 0.66% of the full output range.

Dynamic testing revealed rise and fall times of approximately 8.3 ms and 11.3 ms, respectively. The millisecond-range response is primarily attributed to the purely integral control in the feedback loop, which inherently limits switching speed, and is further influenced by the 10 kHz carrier frequency.

The proposed interface demonstrates high sensitivity, resolution, and linearity. It effectively rejects common-mode noise and reduces parasitic influences, although minor residual effects from the PCB milling process persist. Future improvements may include implementing a proportional-integral-derivative (PID) controller to enhance dynamic performance and transitioning to application-specific integrated circuit (ASIC) or industrial PCB fabrication to reduce size, power consumption, and parasitic sensitivity.