A Programmable Transimpedance Amplifier for High Capacitive Sensors
Transimpedance amplifiers (TIAs) are fundamental in applications requiring current-domain readout, including biosensing, materials characterization, and solid-state device testing. These systems demand high transimpedance gain, wide bandwidth, and low input-referred noise. However, conventional TIAs based on resistive feedback suffer from inherent trade-offs, such as achieving high gain requires large feedback resistors, which increase area and reduce bandwidth due to the resistor-capacitor (RC) pole formed with sensor capacitance. Moreover, such resistors elevate the noise floor and complicate integration. Pseudoresistors, commonly used as area-efficient substitutes, introduce flicker noise and are highly sensitive to process-voltage-temperature (PVT) variations, limiting reliability and noise performance.
To address these limitations, a novel TIA architecture is proposed, using an active-feedback network with a transconductor in the negative feedback loop. This approach multiplies the impedance without requiring pseudoresistors or off-chip components, enabling high programmable gain while remaining compact and robust. To ensure stability, the dominant pole is deliberately placed at the input node, decoupling gain from stability constraints. The bandwidth is analytically determined by cutting the feedback loop and depends on the amplifier gain, feedback resistance, and input capacitance.
The TIA is fabricated in 65-nm CMOS (complementary metal–oxide–semiconductor) technology and occupies only 0.013 mm² with total power consumption of 720 μW from a 1.2 V supply. It supports ten programmable gain settings from 23 kΩ to 17 MΩ. The gain is set by adjusting the ratio of transconductance between two diode-connected MOSFETs (metal–oxide–semiconductor field-effect transistors) and a feedback resistor (RA), providing flexibility and low process sensitivity. The amplifier stages are based on a Lee load class-A Operational Transconductance Amplifier (OTA) topology, offering 61 dB open-loop gain and 170 MHz gain-bandwidth product while consuming 197 μA each.
A complete system-on-chip integrates the TIA with an anti-aliasing filter (AAF) and a 12-bit SAR ADC (successive approximation register analogue-to-digital converter). A microcontroller acquires the digitized current signals and transmits them to a computer for real-time monitoring. At its highest gain setting, the TIA achieves a bandwidth of 2.3 kHz with a 1 nF input capacitance. At the same time, the architecture remains robust with input capacitances up to 44 nF, and the bandwidth scales inversely with increasing capacitance.
The architecture was validated with two high-capacitance use cases: an InP-based p-i-n (Positive-Intrinsic-Negative) diode (2.5 nF) and an organic electrochemical RAM (EC-RAM) with 44 nF gate capacitance. The programmable gain enabled complete characterization of DC and noise behaviour over wide bias ranges (e.g., 0.1 nA to 10 μA), making the TIA suitable for advanced analogue computing and photonic device applications. Signal fidelity, linearity, and bandwidth also remain robust even under high capacitive loading.
The proposed TIA is high-performance, compact, and energy-efficient, making it ideal for modern sensor systems with high gain and low noise across different capacitive loads. Its innovative feedback mechanism utilizes active components to eliminate pseudoresistors and offer scalable and robust solutions for analogue front ends in biosensing, material characterization, and neuromorphic computing.